LXT9782 datasheet(47/78 Pages) INTEL

47 / 78 page

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782

Datasheet

Intel recommends dividing the VCC plane into two sections. The digital section supplies power to

the VCCD and VCCIO pins of the LXT97x2. The analog section supplies power to the VCCA

pins. The break between the two planes should run underneath the device. In designs with more

than one LXT97x2, a single continuous analog VCC plane can be used to supply them all.

The digital and analog VCC planes should be joined at one or more points by ferrite beads. The

beads should produce at least a 100

Ω impedance at 100 MHz. Beads should be placed so that

current flow is evenly distributed. The maximum current rating of the beads should be at least

150% of the current that is actually expected to flow through them. A bulk cap (2.2 -10

µF) should

be place on each side of each bead.

In addition, a high-frequency bypass cap (.01

µF) should be placed near each analog VCC pin.

3.1.3

Power and Ground Plane Layout Considerations

Take great care when laying out the power and ground planes. The following guidelines are

recommended:

• Follow the guidelines in the LXT97x2 Design & Layout Guide for locating the split between

the digital and analog VCC planes.

• Keep the digital VCC plane away from the TPFOP/N and TPFIP/N signals, away from the

magnetics, and away from the RJ-45 connectors.

• Place the layers so that the TPFOP/N and TPFIP/N signals can be routed near or next to the

ground plane. For EMI reasons, it is more important to shield TPFOP/N than TPFIP/N.

3.1.3.1

Chassis Ground

For ESD reasons, it is a good design practice to create a separate chassis ground that encircles the

board and is isolated via moats and keep-out areas from all circuit-ground planes and active

signals. Chassis ground should extend from the RJ45 connectors to the magnetics, and can be used

to terminate unused signal pairs (‘Bob Smith’ termination). In single-point grounding applications,

provide a single connection between chassis and circuit grounds with a 2 kV isolation capacitor. In

multi-point grounding schemes (chassis and circuit grounds joined at multiple points), provide 2

kV isolation to the Bob Smith termination.

3.1.4

MII Terminations

Series termination resistors are not required on the SMII signals driven by the LXT97x2.

3.1.5

The RBIAS Pin

The LXT97x2 requires a 22.1 k

Ω, 1% resistor directly connected between the RBIAS pin and

ground. Place the RBIAS resistor as close to the RBIAS pin as possible. Run an etch directly from

the pin to the resistor, and sink the other side of the resistor to a filtered ground. Surround the

RBIAS trace with a filtered ground; do not run high-speed signals next to RBIAS.

3.1.6

The Twisted-Pair Interface

Follow standard guidelines for a twisted-pair interface:

• Keep transmit pair traces as short as possible; both traces should have the same length.

LXT9782 Datasheet(PDF) 47 Page - Intel Corporation

LXT9782 Datasheet(HTML) 47 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

Datasheet Download

Link URL