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FP6606 Datasheet(PDF) 24 Page - Fitipower Integrated Technology Inc. |
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FP6606 Datasheet(HTML) 24 Page - Fitipower Integrated Technology Inc. |
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24 / 73 page  FP6606 24 FP6606- Preliminary 0.3-JUN-2018 Alert High Byte Register (address = 0x10) [reset =0x02] If the FP6606 finishes the initiation, the PWR_STATUS bit will be set to high for informing the TCPM. When the FP6606 is powered on or reset, the default value of this register will be set to 0x02 caused by the PWR_STATUS bit. This register is used to indicate a status change event. When a status change event occurs and its corresponding Alert mask is unmasked, the FP6606 will assert the INT_N low. The INT_N remains asserted until all events are cleared by write of 1’b1. Once all events are cleared or corresponding Alert mask is masked, the INT_N will be de-asserted high. Alert High Byte Register 7 6 5 4 3 2 1 0 VBUS_ALAR M_HI TX_SOP_SU CCESS TX_SOP_DIS CARD TX_SOP_FAI L RX_HARD_R ESET RX_SOP_ST ATUS PWR_STATU S CC_STATUS RCU RCU RCU RCU RCU RCU RCU RCU LEGEND: R/W = Read/Write; R = Read only Alert High Byte Register Descriptions Bit Field Type Reset Description 7 VBUS_ALARM_HI RCU 0 VBUS Voltage Alarm High 0b: Cleared 1b: A high-voltage alarm has occurred. Please refer to Reg.0x78 and Reg. 0x79 for setting high-voltage alarm level. 6 TX_SOP_SUCCESS RCU 0 Transmit SOP* Message Successful 0b: Cleared 1b: Reset or SOP* message transmission successful. GoodCRC response received on SOP* message transmission. Transmit SOP* message buffer registers are empty. 5 TX_SOP_DISCARD RCU 0 Transmit SOP* Message Discarded 0b: Cleared 1b: Reset or SOP* message transmission not sent due to incoming receive message. Transmit SOP* message buffer registers are empty. 4 TX_SOP_FAIL RCU 0 Transmit SOP* Message Failed 0b: Cleared 1b: SOP* message transmission not successful, no GoodCRC response received on SOP* message transmission. Transmit SOP* message buffer registers are empty. 3 RX_HARD_RESET RCU 0 Received Hard Reset 0b: Cleared. 1b: Received Hard Reset message 2 RX_SOP_STATUS RCU 0 Receive SOP* Message Status 0b: Cleared. 1b: Receive buffer register changed. RECEIVE_BYTE_COUNT (Reg.0x30) being set to 0 does not set this bit. 1 PWR_STATUS RCU 1 Power Status 0b: Cleared. 1b: Power Status Changed 0 CC_STATUS RCU 0 CC Status 0b: Cleared 1b: CC status changed |
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