FN6690 datasheet(9/19 Pages) RENESAS

9 / 19 page

ISL12008 I2C Real Time Clock with Battery Backup

FN6690 Rev 1.00

Page 9 of 19

Sep 26, 2008

Also provided is the ability to adjust the crystal capacitance

when the ISL12008 switches from VDD to battery backup

mode. See “Battery Backup Mode (VBAT) to Normal Mode

(VDD)” on page 7.

The battery-backed registers are accessible following a slave

byte of “1101000x” and reads or writes to addresses [00h:1Fh].

The defined addresses and default values are described in

Table 1. Address 12h to 1Eh are not used. Reads or writes to

12h to 1Eh will not affect operation of the device but should be

avoided.

The contents of address 00h to 07h can be modified by

performing a byte or a page write operation directly to any

07h, the address will wrap around from 07h to 00h. All the

other registers (Address 08h to 11h and 1Fh) can be modified

by performing a byte write operation.

The registers are divided into 3 sections. These are:

1. Real Time Clock (8 bytes): Address 00h to 06h, and 1Fh.

Address 1Fh is Sub-Second register and it is a read-only.

2. Control and Status (4 bytes): Address 07h to 0Bh.

3. Alarm (6 bytes): Address 0Ch to 11h.

There are no addresses above 1Fh.

Address 12h to 1Eh are not used. Reads or writes to 12h to

1Eh will not affect operation of the device but should be

avoided.

A register can be read by performing a random read at any

address at any time. This returns the contents of that register

location. Additional registers are read by performing a

sequential read. For the RTC and Alarm registers, the read

operation latches all clock registers into a buffer, so an update

of the clock does not change the time being read. A sequential

read will not result in the output of data from the memory array.

At the end of a read, the master supplies a stop condition to

end the operation and free the bus. After a read, the address

remains at the previous address +1 so the user can execute a

current address read and continue reading the next register. In

a sequential read, the address will warp around at address 07h

to 00h; therefore, please use byte read operation to read the

registers after address 07h.

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