4282 datasheet(18/69 Pages) RENESAS

18 / 69 page

Rev.1.33

Mar 18, 2004

page 18 of 67

4282 Group

VOLTAGE DROP DETECTION CIRCUIT

The built-in voltage drop detection circuit is designed to detect a

drop in voltage at operating and to reset the microcomputer if

the supply voltage drops below the specified value (Typ. 1.50 V)

or less.

Fig. 21 Voltage drop detection circuit operation waveform

The voltage drop detection circuit is stopped and power

dissipation is reduced in the RAM back-up mode with the

initialized CPU stopped.

VDD

Internal reset signal

Reset voltage

TYP 1.5V

(Note)

Note: The voltage drop detection circuit does not have

the hysteresis characteristics in the detected voltage.

Microcomputer starts operation

after f(XIN) is counted to 16384 times.

Fig. 22 VDD and VDET

000

111

000

Fig. 20 Internal state at reset

• Program counter (PC) ..............................................................

Address 0 in page 0 is set to program counter.

• Power down flag (P) .................................................................

• Timer 1 underflow flag (T1F) ...................................................

• Timer 2 underflow flag (T2F) ...................................................

• Timer control register V1 ..........................................................

• Timer control register V2 ..........................................................

• Port CARR output flag (CAR) ..................................................

• Pull-down control register PU0 ................................................

• Pull-down control register PU1 ................................................

• Logic operation selection register LO ......................................

• Most significant ROM code reference enable flag (URS)

• Carry flag (CY) .........................................................................

• Register A .................................................................................

• Register B .................................................................................

• Register X .................................................................................

• Register Y .................................................................................

• Stack pointer (SP) ....................................................................

Note on voltage drop detection circuit

The voltage drop detection circuit detection voltage of this

product is set up lower than the minimum value of the supply

voltage of the recommended operating conditions.

A battery exchange of an application product is explained as

an example.

The supply voltage falls below to the recommended operating

voltage while CPU keeps active. Then, an unexpected

oscillation-stop, which does not happen by POF instruction

occurs before the supply voltage falls below to the detection

voltage. In this time, even if the supply voltage re-goes up to

the recommended operating voltage, since reset does not

occur, MCU may not operate correctly.

Please confirm the oscillator you use and the frequency of

system clock, and test the operation of your system sufficiently.

VDD

Recommended operatng

condition min.value

Even if the voltage re-goes up to

the recommended operating voltage,

MCU may not operate correctly.

Oscillation is stopped

incorrectly.

VDET

VDD

Recommended

operatng condition

min.value

VDET

→ Normal operation

Reset

4282 Datasheet(PDF) 18 Page - Renesas Technology Corp

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