4282 datasheet(3/69 Pages) RENESAS

3 / 69 page

Rev.1.33

Mar 18, 2004

page 3 of 67

4282 Group

PERFORMANCE OVERVIEW

Function

8.0

µs (f(XIN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)

2048 words ✕ 9 bits

1024 words ✕ 9 bits

64 words ✕ 4 bits

48 words ✕ 4 bits

Four independent output ports

Four independent I/O ports with the pull-down function

3-bit input port with the pull-down function

2-bit output port (E0, E1)

4-bit I/O port with the pull-down function

1-bit output port; CMOS output

8-bit timer with a reload register

8-bit timer with two reload registers

4 levels (However, only 3 levels can be used when the TABP p instruction is executed)

CMOS silicon gate

20-pin plastic molded SSOP (20P2E/F-A)

–20 °C to 85 °C

1.8 V to 3.6 V

400

µA

(f(XIN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)

0.1

µA (at room temperature, VDD = 3 V)

Parameter

Number of basic instructions

Minimum instruction execution time

Memory sizes

Input/Output

ports

Timer

Subroutine nesting

Device structure

Package

Operating temperature range

Supply voltage

Power

dissipation

(typical value)

ROM

RAM

D0–D3

D4–D7

E0–E2

E0, E1

G0–G3

CARR

Timer 1

Timer 2

Active mode

RAM back-up mode

M34282M2/E2

M34282M1

M34282M2/E2

M34282M1

Output

I/O

Input

Output

I/O

Output

PIN DESCRIPTION

Name

Power supply

Ground

System clock input

System clock output

Output port D

I/O port D

I/O port E

I/O port G

Carrier wave output

for remote control

Input/Output

—

Input

Output

I/O

Output

Input

I/O

Output

Function

Connected to a plus power supply.

Connected to a 0 V power supply.

I/O pins of the system clock generating circuit. Connect a ceramic resonator

between pins XIN and XOUT. The feedback resistor is built-in between pins XIN

and XOUT.

Each pin of port D has an independent 1-bit wide output function. The output

structure is P-channel open-drain.

1-bit I/O port. For input use, set the latch of the specified bit to “0.” When the built-

in pull-down transistor is turned on, the key-on wakeup function using “H” level

sense and the pull-down transistor become valid. The output structure is P-channel

open-drain.

2-bit (E0, E1) output port. The output structure is P-channel open-drain.

3-bit input port. For input use (E0, E1), set the latch of the specified bit to “0.”

When the built-in pull-down transistor is turned on, the key-on wakeup function

using “H” level sense and the pull-down transistor become valid. Port E2 has an

input-only port and has a key-on wakeup function using “H” level sense and pull-

down transistor.

4-bit I/O port. For input use, set the latch of the specified bit to “0.” The output structure

is P-channel open-drain. When the built-in pull-down transistor is turned on, the key-

on wakeup function using “H” level sense and pull-down transistor become valid.

Carrier wave output pin for remote control. The output structure is CMOS circuit.

VDD

VSS

XIN

XOUT

D0–D3

D4–D7

E0–E2

G0–G3

CARR

4282 Datasheet(PDF) 3 Page - Renesas Technology Corp

4282 Datasheet(HTML) 3 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Datasheet Download

Link URL