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M37160MF Datasheet(PDF) 55 Page - Renesas Technology Corp |
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M37160MF Datasheet(HTML) 55 Page - Renesas Technology Corp |
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55 / 131 page ![]() Rev.1.01 2003.11.13 page 55 of 130 M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP Fig. 8.10.4 Block Control Register i Fig. 8.10.5 Color dot OSD Control Register b7 b6 b5 b4 b3 b2 b1 b0 B Name Functions After reset R W Color dot OSD control register 1 2 to 7 R — RW R W 0 Color dot OSD control register (CDT) [Address 00DA16] Indeterminate Nothing is assigned. This bit is write disable bit. When this bit is read out, the value is "Indeterminate." Indeterminate Indeterminate Color dot Block 1 Setting bit (CDT0) Color dot Block 2 Setting bit (CDT1) 0 : OSD2 mode 1 : CD OSD mode 0 : OSD2 mode 1 : CD OSD mode b7 b6 b5 b4 b3 b2 b1 b0 Block control register i (BCi) (i=1, 2) [Addresses 00D216 and 00D316] Block Control register i 0, 1 Display mode selection bits (BCi0, BCi1) (See note 4) Indeterminate 2, 3 Dot size selection bits (BCi2, BCi3) b4 b3 b2 Pre-divide Ratio Dot Size 4 Pre-divide ratio selection bit (BCi4) 5 7 Window top/bottom boundary control bit (BCi7) Notes 1:Tc is OSD clock cycle divided in pre-divide circuit. 2:H is HSYNC. 6 Vertical display start position control bit (BCi6) BC16: Block 1 BC26: Block 1 b1 b0 0 0: Display OFF 0 1: OSD1 mode 1 0: OSD2 mode (Border OFF) 1 1: OSD2 mode (Border ON) /CD OSD mode (Border OFF) 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 1 ✕ 2 ✕ 3 1Tc ✕ 1/2H 1Tc ✕ 1H 2Tc ✕ 2H 3Tc ✕ 3H 1Tc ✕ 1/2H 1Tc ✕ 1H 2Tc ✕ 2H 3Tc ✕ 3H BC17: Window top boundary BC27: Window bottom boundary B Name Functions After reset RW RW Indeterminate RW Indeterminate RW Indeterminate RW Indeterminate RW Indeterminate RW 0: 2 value output control 1: 3 value output control (See note 3) 3: Refer to the corresponding figure 8.10.18. OUToutput control bit (BCi5) (See note 1) 4: Selection in OSD2 mode/CD OSD mode is performed in the bits 0 and 1 of color dot OSD control registration. |
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