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SH7261 Datasheet(PDF) 721 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 721 Page - Renesas Technology Corp

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Section 16 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Sep. 07, 2007 Page 689 of 1312
REJ09B0320-0200
Bit
Bit Name
Initial
Value
R/W
Description
2
PER
0
R
Parity Error Indication
Indicates a parity error in the data read from the next
receive FIFO data register (SCFRDR) in
asynchronous mode.
0: No receive parity error occurred in the next data
read from SCFRDR
[Clearing conditions]
• PER is cleared to 0 when the chip undergoes a
power-on reset
• PER is cleared to 0 when no parity error is present
in the next data read from SCFRDR
1: A receive parity error occurred in the next data read
from SCFRDR
[Setting condition]
• PER is set to 1 when a parity error is present in
the next data read from SCFRDR



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