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SH7261 Datasheet(PDF) 893 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 893 Page - Renesas Technology Corp

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Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613]
Rev. 2.00 Sep. 07, 2007 Page 861 of 1312
REJ09B0320-0200
The following table shows conditions to access registers.
Table 19.8
Conditions to Access Registers
RCAN-ET Registers
Status Mode
MCR
GSR
IRR
IMR
BCR
MBIMR
Flag_register
mailbox
(ctrl0, LAFM)
mailbox
(data)
mailbox
(ctrl1)
Reset
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Transmission
Reception
Yes
Yes
No*
1
Yes
Yes
No*
1
Yes*
2
Yes*
2
No*
1
Yes*
2
Halt Request
Yes
Yes
No*
1
Yes
Yes
No*
1
Yes*
2
Yes*
2
No*
1
Yes*
2
Halt
Yes
Yes
No*
1
Yes
Yes
Yes
Yes
Yes
Sleep
Yes
Yes
No
No
No
No
No
No
Notes: 1. No hardware protection
2. When TXPR is not set.
19.6.2
Test Mode Settings
The RCAN-ET has various test modes. The register TST[2:0] (MCR[10:8]) is used to select the
RCAN-ET test mode. The default (initialized) settings allow RCAN-ET to operate in Normal
mode. The following table is examples for test modes.
Test Mode can be selected only while in configuration mode. The user must then exit the
configuration mode (ensuring BCR0/BCR1 is set) in order to run the selected test mode.
Table 19.9
Test Mode Settings
Bit10:
TST2
Bit9:
TST1
Bit8:
TST0
Description
0
0
0
Normal mode (initial value)
0
0
1
Listen-only mode (receive-only mode)
0
1
0
Self test mode 1 (external)
0
1
1
Self test mode 2 (internal)
1
0
0
Write error counter
1
0
1
Error passive mode
1
1
0
Setting prohibited
1
1
1
Setting prohibited



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