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SH7261 Datasheet(PDF) 918 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 918 Page - Renesas Technology Corp |
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918 / 1348 page ![]() Section 20 IEBus TM Controller (IEB) [R5S72612] [R5S72613] Rev. 2.00 Sep. 07, 2007 Page 886 of 1312 REJ09B0320-0200 (7) Parity bit The parity bit is used to confirm that transfer data occurs with no errors. The parity bit is added to respective data of the master address, slave address, control, message length, and data bits. Even parity is used. When the number of bits having the value 1 is odd, the parity bit is 1. When the number of bits having the value 1 is even, the parity bit is 0. (8) Acknowledge bit In normal communications (single unit to single unit communications), the acknowledge bit is added in the following positions to confirm that data is correctly accepted. • At the end of the slave address field • At the end of the control field • At the end of the message length field • At the end of the data field The acknowledge bit is defined below. • 0: indicates that the transfer data is acknowledged. (ACK) • 1: indicates that the transfer data is not acknowledged. (NAK) Note that the acknowledge bit is ignored in the case of broadcast communications. (a) Acknowledge bit at the End of the Slave Address Field The acknowledge bit at the end of the slave address field becomes NAK in the following cases and transfer is stopped. • When the parity of the master address or slave address bits is incorrect • When a timing error (an error in bit format) occurs • When there is no slave unit |
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