SH7261 datasheet(976/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 944 of 1312

REJ09B0320-0200

• Data buffering control

The CD-ROM decoder outputs data to the buffer area in a specific format where the sync code

is at the head of the data for each sector.

21.1.1

Formats Supported by ROM-DEC

The CD-ROM decoder of this LSI supports the five formats shown in figure 21.1.

Sync

(12 bytes)

Header

(4 bytes)

Sync

(12 bytes)

Header

(4 bytes)

Sync

(12 bytes)

Header

(4 bytes)

Sync

(12 bytes)

Header

(4 bytes)

Sync

(12 bytes)

Header

(4 bytes)

Sub-header

(8 bytes)

Sub-header

(8 bytes)

Q-parity

(104 bytes)

P-parity

(172 bytes)

(8 bytes)

EDC

(4 bytes)

Q-parity

(104 bytes)

P-parity

(172 bytes)

EDC

(4 bytes)

EDC

(4 bytes)

Mode1

Mode2

(not XA)

Mode2

Form1

Mode2

Form2

Mode0

All 0

Data (2048 bytes)

Data (2336 bytes)

Data (2048 bytes)

Data (2324 bytes)

Figure 21.1 Formats Supported by ROM-DEC

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