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SH7261 Datasheet(PDF) 992 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 992 Page - Renesas Technology Corp

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Section 21 CD-ROM Decoder (ROM-DEC)
Rev. 2.00 Sep. 07, 2007 Page 960 of 1312
REJ09B0320-0200
21.3.8
Sync Code Status Register (CROMST0)
CROMST0 indicates various status information in sync code maintenance modes.
76543210
Bit:
Initial value:
R/W:
00000000
RRRRRRRR
——
ST_
SYIL
ST_
SYNO
ST_
BLKS
ST_
BLKL
ST_
SECS
ST_
SECL
Bit
Bit Name
Initial
Value
R/W
Description
7, 6
All 0
R
Reserved
These bits are always read as 0 and cannot be
modified.
5
ST_SYIL
0
R
Indicates that a sync code was detected at a position
where the value in the word counter (used to measure
intervals between sync codes) was not correct, but the
sync code was ignored and not taken into account in
synchronization.
This bit is only valid in automatic sync maintenance
mode and interpolated sync mode.
4
ST_SYNO
0
R
Indicates that a sync code has not been detected
despite the word counter having reached the final value,
and synchronization has been continued with the aid of
an interpolated sync code.
This bit is only valid in automatic sync maintenance
mode and interpolated sync mode.
3
ST_BLKS
0
R
Indicates that a sync code was detected at a position
where the value in the word counter was not correct,
and the sync code was used in synchronization.
This bit is only valid in automatic sync maintenance
mode and external sync mode.
2
ST_BLKL
0
R
Indicates that a sync code has not been detected
despite the word counter having reached the final value,
and the period of the sector has been prolonged.
This bit is only valid in external sync mode.



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