SH7261 datasheet(293/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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293 / 1348 page

Section 9 Bus State Controller (BSC)

Rev. 2.00 Sep. 07, 2007 Page 261 of 1312

REJ09B0320-0200

CKIO

ACT: Row and bank activation command

RD:

Read command

PRA: Precharge-all command

SDRAM command

Data bus

Multiple read

ACT

PRA

Figure 9.14 Multiple Read Timing Example (Multiple Read of 4 Data Units,

Shortest Timing Settings) Consecutive Read Commands Issued

CKIO

ACT: Row and bank activation command

WR: Write command

PRA: Precharge-all command

SDRAM command

Data bus

Multiple write

ACT

PRA

Figure 9.15 Multiple Write Timing Example (Multiple Write of 4 Data Units,

Shortest Timing Settings) Consecutive Write Commands Issued

CKIO

ACT: Row and bank activation command

RD:

Read command

PRA: Precharge-all command

DSL: Deselect command

SDRAM command

Data bus

Multiple read

ACT

DSL

PRA

Figure 9.16 Multiple Read Timing Example (Multiple Read of 4 Data Units,

Shortest Timing Settings) Non-Consecutive Read Commands Issued

SH7261 Datasheet(PDF) 293 Page - Renesas Technology Corp