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SH7672 Datasheet(PDF) 388 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 388 Page - Renesas Technology Corp |
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388 / 1292 page  Section 10 Watchdog Timer (WDT) Rev. 1.00 Nov. 14, 2007 Page 362 of 1262 REJ09B0437-0100 Figure 10.1 shows a block diagram of the WDT. WDTOVF WTCSR WTCNT WRCSR WDT Standby control Bus interface Divider Clock selector Clock Standby mode Peripheral clock Standby cancellation Reset control Clock selection Overflow Internal reset request* Interrupt control Interrupt request [Legend] WTCSR: WTCNT: WRCSR: Watchdog timer control/status register Watchdog timer counter Watchdog reset control/status register Note: * The internal reset signal can be generated by making a register setting. Figure 10.1 Block Diagram of WDT 10.2 Input/Output Pin Table 10.1 shows the pin configuration of the WDT. Table 10.1 Pin Configuration Pin Name Symbol I/O Function Watchdog timer overflow WDTOVF Output Outputs the counter overflow signal in watchdog timer mode |
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