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SH7672 Datasheet(PDF) 404 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 404 Page - Renesas Technology Corp |
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404 / 1292 page ![]() Section 11 Power-Down Modes Rev. 1.00 Nov. 14, 2007 Page 378 of 1262 REJ09B0437-0100 11.2.2 Standby Control Register 2 (STBCR2) STBCR2 is an 8-bit readable/writable register that controls the operation of modules in power- down modes. STBCR2 is initialized to H'00 by a power-on reset but retains its previous value by a manual reset or in software standby mode. Only byte access is valid. Note: See section 11.4, Usage Notes, when writing data to this register. 76543210 Bit: Initial Value: R/W: 00000000 R/W R/W R/W R/W RRRR MSTP 10 MSTP 9 MSTP 8 MSTP 7 Bit Bit Name Initial Value R/W Description 7 MSTP10 0 R/W Module Stop 10 When the MSTP10 bit is set to 1, the supply of the clock to the H-UDI is halted. 0: H-UDI runs. 1: Clock supply to H-UDI halted. 6 MSTP9 0 R/W Module Stop 9 When the MSTP9 bit is set to 1, the supply of the clock to the UBC is halted. 0: UBC runs. 1: Clock supply to UBC halted. 5 MSTP8 0 R/W Module Stop 8 When the MSTP8 bit is set to 1, the supply of the clock to the DMAC is halted. 0: DMAC runs. 1: Clock supply to DMAC halted. |
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