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SH7672 Datasheet(PDF) 408 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 408 Page - Renesas Technology Corp |
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408 / 1292 page ![]() Section 11 Power-Down Modes Rev. 1.00 Nov. 14, 2007 Page 382 of 1262 REJ09B0437-0100 11.2.4 Standby Control Register 4 (STBCR4) STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power- down modes. STBCR4 is initialized to H'00 by a power-on reset but retains its previous value by a manual reset or in software standby mode. Only byte access is valid. Note: See section 11.4, Usage Notes, when writing data to this register. 76543210 Bit: Initial Value: R/W: 0000 0 0 R R/W R/W R/W R/W R/W 0 R/W 0 R/W MSTP 46 MSTP 45 MSTP 44 MSTP 42 MSTP 40 MSTP 41 MSTP 43 Bit Bit Name Initial Value R/W Description 7 0 R Reserved This bit is always read as 0. The write value should always be 0. 6 MSTP46 0 R/W Module Stop 46 When the MSTP46 bit is set to 1, the supply of the clock to the SSI1 is halted. 0: SSI1 runs. 1: Clock supply to SSI1 halted. 5 MSTP45 0 R/W Module Stop 45 When the MSTP45 bit is set to 1, the supply of the clock to the SSI0 is halted. 0: SSI0 runs. 1: Clock supply to SSI0 halted. 4 MSTP44 0 R/W Module Stop 44 When the MSTP44 bit is set to 1, the supply of the clock to the HIF is halted. 0: HIF runs. 1: Clock supply to HIF halted. |
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