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SH7672 Datasheet(PDF) 409 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 409 Page - Renesas Technology Corp |
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409 / 1292 page ![]() Section 11 Power-Down Modes Rev. 1.00 Nov. 14, 2007 Page 383 of 1262 REJ09B0437-0100 Bit Bit Name Initial Value R/W Description 3 MSTP43 0 R/W Module Stop 43 When the MSTP43 bit is set to 1, the supply of the clock to the A-DMAC is halted. 0: A-DMAC runs. 1: Clock supply to A-DMAC halted. 2 MSTP42 0 R/W Module Stop 42 When the MSTP42 bit is set to 1, the supply of the clock to the SDHI is halted. 0: SDHI runs. 1: Clock supply to SDHI halted. 1 MSTP41 0 R/W Module Stop 41 When the MSTP41 bit is set to 1, the supply of the clock to the USB is halted. 0: USB runs. 1: Clock supply to USB halted. 0 MSTP40 0 R/W Module Stop 40 When the MSTP40 bit is set to 1, the supply of the clock to the EtherC is halted. 0: EtherC runs. 1: Clock supply to EtherC halted. |
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