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SH7672 Datasheet(PDF) 411 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 411 Page - Renesas Technology Corp |
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411 / 1292 page ![]() Section 11 Power-Down Modes Rev. 1.00 Nov. 14, 2007 Page 385 of 1262 REJ09B0437-0100 Bit Bit Name Initial Value R/W Description 2 RAME2 1 R/W RAM Enable 2 (corresponding RAM addresses: Page 2 in on-chip RAM (high-speed)*) 0: On-chip RAM (high-speed) disabled 1: On-chip RAM (high-speed) enabled 1 RAME1 1 R/W RAM Enable 1 (corresponding RAM addresses: Page 1 in on-chip RAM (high-speed)*) 0: On-chip RAM (high-speed) disabled 1: On-chip RAM (high-speed) enabled 0 RAME0 1 R/W RAM Enable 0 (corresponding RAM addresses: Page 0 in on-chip RAM (high-speed)*) 0: On-chip RAM (high-speed) disabled 1: On-chip RAM (high-speed) enabled Note: * For specific address for each page, see section 27, On-Chip RAM. |
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