SH7672 datasheet(466/1292 Pages) RENESAS

Part #	SH7672

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

PDF	1292 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 440 of 1262

REJ09B0437-0100

Bit

Bit Name

Initial

value

R/W

Description

DL1

DL0

R/W

Descriptor Length

These bits specify the descriptor length.

00: 16 bytes

01: 32 bytes

10: 64 bytes

11: Reserved (setting prohibited)

3 to 1



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

SWR

R/W

Software Reset

Writing 1 in this bit initializes registers of the E-DMAC

other than TDLAR, RDLAR, and RMFCR and registers

of the EtherC. While a software reset is being

executed (64 cycles of the internal bus clock B

φ),

accesses to the all Ethernet-related registers are

prohibited.

Software reset period (example):

When B

φ = 100 MHz: 0.64 µS

When B

φ = 75 MHz: 0.85 µS

This bit is always read as 0.

0: Writing 0 is ignored (E-DMAC operation is not

affected)

1: Writing 1 resets the EtherC and E-DMAC and then

automatically cleared

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