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SH7672 Datasheet(PDF) 469 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 469 Page - Renesas Technology Corp

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Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 1.00 Nov. 14, 2007 Page 443 of 1262
REJ09B0437-0100
13.2.4
Transmit Descriptor List Address Register (TDLAR)
TDLAR is a 32-bit readable/writable register that specifies the start address of the transmit
descriptor list. Descriptors have a boundary configuration in accordance with the descriptor length
indicated by the DL bit in EDMR. This register must not be written to during transmission.
Modifications to this register should only be made while transmission is disabled by the TR bit
(
= 0) in the E-DMAC transmit request register (EDTRR).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
Initial Value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Initial Value:
R/W:
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TDLA[31:16]
TDLA[15:0]
Bit
Bit Name
Initial
value
R/W
Description
31 to 0
TDLA[31:0]
All 0
R/W
Transmit Descriptor Start Address
The lower bits are set as follows according to the
specified descriptor length.
16-byte boundary: TDLA3 to TDLA0 = 0000
32-byte boundary: TDLA4 to TDLA0 = 00000
64-byte boundary: TDLA5 to TDLA0 = 000000



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