SH7672 datasheet(521/1292 Pages) RENESAS

521 / 1292 page

Section 14 DMAC That Works with Encryption/Decryption and Forward Error Correction Core (A-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 495 of 1262

REJ09B0437-0100

A-DMAC

CPU control

Channel0 control

BUS I/F control

BUS I/F data

I-BUS control

INTC

STIF0

STIF1

Arbiter

Function

· Arbitration

I-BUS

Channel 0 for checksum

Function

· DMA automatic

processing

· Checksum operation

· Processing data

management,

Data selector

Channel 1 for checksum

· DMA automatic

processing

· Checksum operation

· Processing data

management,

Data selector

Function

I-BUS

interface

· Bus protocol

conversion

STIF0

interface

· STIF0 protocol

conversion

STIF1

interface

· STIF1 protocol

conversion

Function

FEC channel

· DMA autmatic

processing

· XOR operation

I-BUS data

STIF0control

STIF0 data

STIF1 control

STIF1 data

STIF0 I/F control

STIF0 I/F data

STIF1 I/F control

STIF1 I/F data

Channel0 data

Channel1 control

Channel1 data

FEC

channel control

FEC

channel data

CPU control data

ADMA interrupt

ad_irqc0_n

ad_irqc1_n

ad_irqfec_n

x_rst

x_bck

x_bckstp_p

x_modstp_p

Figure 14.1 Block Diagram of A-DMAC

SH7672 Datasheet(PDF) 521 Page - Renesas Technology Corp

SH7672 Datasheet(HTML) 521 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL