SH7672 datasheet(519/1292 Pages) RENESAS

519 / 1292 page

Section 14 DMAC That Works with Encryption/Decryption and Forward Error Correction Core (A-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 493 of 1262

REJ09B0437-0100

Section 14 DMAC That Works with Encryption/Decryption

and Forward Error Correction Core (A-DMAC)

14.1

Overview

The A-DMAC is a high-level descriptor-mode DMAC having error correction function. This

DMAC provides data transfer with memory via an internal shared bus (I-BUS) and data transfer

with an external MPEG device via STIF.

14.1.1

Features

The functions and features of this A-DMAC are as follows:

(1)

Channels for checksum processing

• Number of channels: 2

• Transfer direction: Memory← →memory, memory← →STIF

• Descriptor structure: Structure that enables checksum operation, etc., to be continuously

performed

• Error check: Checksum calculation function

(2)

FEC channels

• Number of channels: 1

• Descriptor structure: Structure that enables processing of any number of data items with a

small number of buffers

• Error correction (FEC): XOR calculation function

(3)

Other features

• Supported endian: Big endian/little endian

• Number of STIFs connected: Two channels

• Channel arbitration: Round robin scheduling that provides highly efficient use of encryption

modules and buses

• Channel operation: Parallel processing

SH7672 Datasheet(PDF) 519 Page - Renesas Technology Corp