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SH7672 Datasheet(PDF) 180 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 180 Page - Renesas Technology Corp |
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180 / 1292 page ![]() Section 6 Interrupt Controller (INTC) Rev. 1.00 Nov. 14, 2007 Page 154 of 1262 REJ09B0437-0100 6.6.2 Stack after Interrupt Exception Handling Figure 6.3 shows the stack after interrupt exception handling. Address SP*2 4n – 8 PC*1 SR 4n – 4 4n 32 bits 32 bits Notes: 1. PC: Start address of the next instruction (return destination instruction) after the executed instruction 2. Always make sure that SP is a multiple of 4. Figure 6.3 Stack after Interrupt Exception Handling |
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