SH7672 datasheet(184/1292 Pages) RENESAS

Part #	SH7672

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

PDF	1292 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

184 / 1292 page

Section 6 Interrupt Controller (INTC)

Rev. 1.00 Nov. 14, 2007 Page 158 of 1262

REJ09B0437-0100

2 Icyc + 3 Bcyc + 1 Pcyc

1 Icyc + m1 + 2(m2) + m3

3 Icyc + m1

IRQ

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

Multiple interrupt acceptance

First instruction in interrupt exception

service routine

First instruction in multiple interrupt

exception service routine

Figure 6.5 Example of Pipeline Operation for Multiple Interrupts

(No Register Banking)

2 Icyc + 3 Bcyc + 1 Pcyc

3 Icyc

3 Icyc + m1 + m2

IRQ

MMM

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

First instruction in interrupt exception

service routine

Instruction (instruction replacing

interrupt exception handling)

Figure 6.6 Example of Pipeline Operation when IRQ Interrupt is Accepted

(Register Banking without Register Bank Overflow)

SH7672 Datasheet(PDF) 184 Page - Renesas Technology Corp

SH7672 Datasheet(HTML) 184 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL