SH7672 datasheet(185/1292 Pages) RENESAS

Part #	SH7672

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

PDF	1292 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 6 Interrupt Controller (INTC)

Rev. 1.00 Nov. 14, 2007 Page 159 of 1262

REJ09B0437-0100

2 Icyc + 3 Bcyc + 1 Pcyc

3 Icyc + m1 + m2

9 Icyc

IRQ

RESBANK instruction

EEEEEEEE

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

First instruction in interrupt

exception service routine

Instruction (instruction replacing

interrupt exception handling)

Figure 6.7 Example of Pipeline Operation when Interrupt is Accepted during RESBANK

Instruction Execution (Register Banking without Register Bank Overflow)

2 Icyc + 3 Bcyc + 1 Pcyc

3 Icyc

3 Icyc + m1 + m2

IRQ

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

First instruction in interrupt exception

service routine

Instruction (instruction replacing

interrupt exception handling)

...

Figure 6.8 Example of Pipeline Operation when IRQ Interrupt is Accepted

(Register Banking with Register Bank Overflow)

SH7672 Datasheet(PDF) 185 Page - Renesas Technology Corp

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