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SH7672 Datasheet(PDF) 192 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 192 Page - Renesas Technology Corp |
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192 / 1292 page  Section 6 Interrupt Controller (INTC) Rev. 1.00 Nov. 14, 2007 Page 166 of 1262 REJ09B0437-0100 6.9 Data Transfer with Interrupt Request Signals Interrupt request signals can be used to activate the DMAC and transfer data. Interrupt sources that are designated to activate the DMAC are masked without being input to the INTC. The mask condition is as follows: Mask condition = DME • (DE0 • interrupt source select 0 + DE1 • interrupt source select 1 + DE2 • interrupt source select 2 + DE3 • interrupt source select 3 + DE4 • interrupt source select 4 + DE5 • interrupt source select 5 + DE6 • interrupt source select 6 + DE7 • interrupt source select 7) Figure 6.13 shows a block diagram of interrupt control. Here, DME is bit 0 in DMAOR of the DMAC, and DEn (n = 0 to 7) is bit 0 in CHCR0 to CHCR7 of the DMAC. For details, see section 8, Direct Memory Access Controller (DMAC). DMAC INTC CPU CPU interrupt request Interrupt source Interrupt source (not specified as DMAC activating source) Interrupt source flag clearing (by DMAC) Figure 6.13 Interrupt Control Block Diagram |
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