SH7672 datasheet(242/1292 Pages) RENESAS

Part #	SH7672

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

PDF	1292 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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242 / 1292 page

Section 7

Bus State Controller (BSC)

Rev. 1.00 Nov. 14, 2007 Page 216 of 1262

REJ09B0437-0100

Bit

Bit Name

Initial

Value

R/W

Description

27, 26



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

25, 24

0P2R[1:0]

R/W

Of the internal bus masters excluding the CPU (that is,

A-DMAC (including F-DMAC), E-DMAC, and DMAC),

set the internal bus master having the second highest

priority level.

00: No setting

01: A-DMAC (including F-DMAC)

10: E-DMAC

11: DMAC

23, 22



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

21, 20

0P3R[1:0]

R/W

Of the internal bus masters excluding the CPU (that is,

A-DMAC (including F-DMAC), E-DMAC, and DMAC),

set the internal bus master having the third highest

priority level.

00: No setting

01: A-DMAC (including F-DMAC)

10: E-DMAC

11: DMAC

19 to 0



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

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