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SH7672 Datasheet(PDF) 255 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 255 Page - Renesas Technology Corp

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Section 7
Bus State Controller (BSC)
Rev. 1.00 Nov. 14, 2007 Page 229 of 1262
REJ09B0437-0100
7.5.3
Access Wait Control
Wait cycle insertion on a normal space access can be controlled by the settings of bits WR3 to
WR0 in CSnWCR. It is possible for areas 4 and 5 to insert wait cycles independently in read
access and in write access. Areas 0, 3, and 6 have common access wait for read cycle and write
cycle. The specified number of Tw cycles are inserted as wait cycles in a normal space access
shown in figure 7.9.
T1
CKIO
A25 to A0
CSn
RD/
WR
RD
D31 to D0
WEn
D31 to D0
BS
Tw
Read
Write
T2
DACKn*
Note: * The waveform for DACKn is when active low is specified.
Figure 7.9
Wait Timing for Normal Space Access (Software Wait Only)



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