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SH7672 Datasheet(PDF) 279 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 279 Page - Renesas Technology Corp |
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279 / 1292 page ![]() Section 7 Bus State Controller (BSC) Rev. 1.00 Nov. 14, 2007 Page 253 of 1262 REJ09B0437-0100 Tc4 Tap Tr Tc2 Tc3 Tc1 Trwl CKIO A25 to A0 CSn RD/ WR RASL, RASU DQMxx D31 to D0 BS DACKn*2 A12/A11*1 CASL, CASU Notes: 1. Address pin to be connected to pin A10 of SDRAM. 2. The waveform for DACKn is when active low is specified. Figure 7.17 Basic Timing for Burst Write (Auto Pre-Charge) |
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