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SH7672 Datasheet(PDF) 280 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 280 Page - Renesas Technology Corp

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Section 7
Bus State Controller (BSC)
Rev. 1.00 Nov. 14, 2007 Page 254 of 1262
REJ09B0437-0100
(6)
Single Write
A write access ends in one cycle when data is written in a cache-disabled space and the data bus
width is larger than or equal to access size. As a single write or burst write with burst length 1 is
set in SDRAM, only the required data is output. The write access that ends in one cycle is called
single write. Figure 7.18 shows the single write basic timing.
Tap
Tr
Tc1
Trwl
CKIO
A25 to A0
CSn
RD/
WR
RASL, RASU
DQMxx
D31 to D0
BS
DACKn*2
A12/A11*1
CASL, CASU
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 7.18
Single Write Basic Timing (Auto-Precharge)



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