38K2 datasheet(341/358 Pages) RENESAS

341 / 358 page

3.4 List of registers

Rev.2.00

Oct 15, 2006

page 80 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

Fig. 3.4.100 Structure of Port P5 pull-up control register

b7 b6 b5 b4 b3 b2 b1 b0

R W

P50 pul l-up control bit

Port P5 pull-up control register (PULL5)

[Address : 0FF216]

Function

At reset

Name

Port P5 pull-up control register

0 : No pull-up

1 : Pull-up

P52 pul l-up control bit

0 : No pull-up

1 : Pull-up

Nothing is arranged for this bit. This is a write disabled bit.

When this bit is read out, the contents are “0”.

Nothing is arranged for these bits. These are write disabled

bits. When these bits are read out, the contents are “0”.

Fig. 3.4.101 Structure of Interrupt edge selection register

b7 b6 b5 b4 b3 b2 b1 b0

0 : Falling edge active

1 : Rising edge active

INT0 interrupt edge

selection bit

Interrupt edge selection register (INTEDGE)

[Address : 0FF316]

Function

At reset

Name

Nothing is arranged for these bits. These are write disabled bits.

When these bits are read out, the contents are “0”.

Interrupt edge selection register

0 : Falling edge active

1 : Rising edge active

INT1 interrupt edge

selection bit

Nothing is arranged for this bits. This is a write disabled bit.

When this bit is read out, the contents are “0”.

38K2 Datasheet(PDF) 341 Page - Renesas Technology Corp

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