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38K2 Datasheet(PDF) 124 Page - Renesas Technology Corp |
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38K2 Datasheet(HTML) 124 Page - Renesas Technology Corp |
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124 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 105 of 130 38K2 Group REJ09B0338-0200 HARDWARE Software Commands Table 10 lists the software commands. After setting the CPU Rewrite Mode Select Bit to “1”, write a soft- ware command to specify an erase or program operation. Each software command is explained below. qRead Array Command (FF16) The read array mode is entered by writing the command code “FF16” in the first bus cycle. When an address to be read is input in one of the bus cycles that follow, the contents of the specified ad- dress are read out at the data bus (D0 to D7). The read array mode is retained intact until another command is written. qRead Status Register Command (7016) When the command code “7016” is written in the first bus cycle, the contents of the status register are read out at the data bus (D0 to D7) by a read in the second bus cycle. The status register is explained in the next section. qClear Status Register Command (5016) This command is used to clear the bits SR4 and SR5 of the status register after they have been set. These bits indicate that opera- tion has ended in an error. To use this command, write the command code “5016” in the first bus cycle. qProgram Command (4016) Program operation starts when the command code “4016” is writ- ten in the first bus cycle. Then, if the address and data to program are written in the 2nd bus cycle, the control circuit of flash memory (data programming and verification) will start a program. Whether the write operation is completed can be confirmed by _____ reading the status register or the RY/BY Status Flag. When the program starts, the read status register mode is entered automati- cally and the contents of the status register is read at the data bus (DB0 to DB7). The status register bit 7 (SR7) is set to “0” at the same time the write operation starts and is returned to “1” upon completion of the write operation. In this case, the read status reg- ister mode remains active until the read array command (FF16) is written. Table 10 List of software commands (CPU rewrite mode) ____ During the program movement, The RY/BY Status Flag of flash memory control register is set to “0”. When the program com- pletes, it becomes “1”. At program end, program results can be checked by reading the status register. Fig. 149 Program flowchart Command Program Clear status register Read array Read status register X X First bus cycle Second bus cycle FF16 7016 5016 4016 Write Write Write Write X SRD Read Write Erase all blocks 2016 Write X 2016 Write (Note 1) WA (Note 2) WD (Note 2) Block erase 2016 Write D016 Write BA (Note 3) Mode Address Mode Address Data (D0 to D7) (D0 to D7) (Note 4) Notes 1: SRD = Status Register Data 2: WA = Write Address, WD = Write Data 3: BA = Block Address to be erased (Input the maximum address of each block.) 4: X denotes a given address in the User ROM area . Cycle number 1 2 1 2 2 2 X X X X Data Start Write 4016 Status register read Program completed NO YES Write address Write data SR4 = 0 ? Program error NO YES SR7 = 1 ? or RY/BY = 1 ? Write |
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