38K2 datasheet(187/358 Pages) RENESAS

187 / 358 page

2.3 Timer

Rev.2.00

Oct 15, 2006

page 38 of 112

38K2 Group

REJ09B0338-0200

APPLICATION

Fig. 2.3.22 Control procedure

RESET

RTI

(A)

← PREX

Low-order 8-bit result of

← Inverted (A)

pulse width measurement

(A)

← TX

High-order 8-bit result of

← Inverted (A)

pulse width measurement

PREX (address 2416)

← 256 – 1

(address 2516)

← 256 – 1

•All interrupts disabled

•Timer X operating mode : Pulse width measurement mode

(Measure “H” level of pulses input from CNTR0 pin.)

•Set division ratio so that Timer X interrupt will occur at

175 ms intervals.

•Timer X interrupt request bit cleared

•Timer X interrupt enabled

•CNTR0 interrupt request bit cleared

•CNTR0 interrupt enabled

•Timer X count start

•Interrupts enabled

Note 1: When using Index X mode flag (T)

Note 2: When using Decimal mode flag (D)

•Push registers used in interrupt process routine

•Pop registers pushed to stack

Pop registers

Initialization

Timer X interrupt process routine

CLT (Note 1)

CLD (Note 2)

Push registers to stack

Process errors

•Error occurs

CNTR0 interrupt process routine

•Division ratio set so that Timer X interrupt will occur at

175 ms intervals.

•Read the count value and store it to RAM

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

SEI

(address 2316)

← XXXX10112

PREX

(address 2416)

← 256 – 1

(address 2516)

← 256 – 1

IREQ1

(address 3C16), bit5

← 0

ICON1

(address 3E16), bit5

← 1

IREQ2

(address 3D16), bit4

← 0

ICON2

(address 3F16), bit4

← 1

(address 2316), bit3

← 0

CLI

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