H83065 datasheet(85/963 Pages) RENESAS

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Section 3 MCU Operating Modes

Rev. 4.00 Jan 26, 2006 page 63 of 938

REJ09B0276-0400

Section 3 MCU Operating Modes

3.1

Overview

3.1.1

Operating Mode Selection

The H8/3067 Group has seven operating modes (modes 1 to 7) that are selected by the mode pins

(MD

2 to MD0) as indicated in table 3.1. The input at these pins determines the size of the address

space and the initial bus mode.

Table 3.1

Operating Mode Selection

Description

Mode Pins

On-Chip

Operating

Mode

Address Space

Initial Bus

Mode*

ROM

RAM

—

000

—

Mode 1

Expanded mode

8 bits

Disabled

Enabled*

Mode 2

Expanded mode

16 bits

Disabled

Enabled*

Mode 3

Expanded mode

8 bits

Disabled

Enabled*

Mode 4

Expanded mode

16 bits

Disabled

Enabled*

Mode 5

Expanded mode

8 bits

Enabled

Enabled*

Mode 6

Single-chip normal mode

—

Enabled

Mode 7

Single-chip advanced

mode

—

Enabled

Notes: 1. In modes 1 to 5, an 8-bit or 16-bit data bus can be selected on a per-area basis by

settings made in the area bus width control register (ABWCR). For details see

section 6, Bus Controller.

2. If the RAME bit in SYSCR is cleared to 0, these addresses become external addresses.

For the address space size there are three choices: 64 kbytes, 1 Mbyte, or 16 Mbytes. The external

data bus is either 8 or 16 bits wide depending on ABWCR settings. If 8-bit access is selected for

all areas, 8-bit bus mode is used. For details see section 6, Bus Controller.

Modes 1 to 4 are externally expanded modes that enable access to external memory and peripheral

devices and disable access to the on-chip ROM. Modes 1 and 2 support a maximum address space

of 1 Mbyte. Modes 3 and 4 support a maximum address space of 16 Mbytes.

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