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H83065 Datasheet(PDF) 24 Page - Renesas Technology Corp |
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H83065 Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 963 page ![]() Section 1 Overview Rev. 4.00 Jan 26, 2006 page 2 of 938 REJ09B0276-0400 Table 1.1 Features Feature Description CPU Upward-compatible with the H8/300 CPU at the object-code level General-register machine • Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit registers) High-speed operation • Maximum clock rate: 20 MHz • Add/subtract: 100 ns • Multiply/divide: 700 ns 16-Mbyte address space Instruction features • 8/16/32-bit data transfer, arithmetic, and logic instructions • Signed and unsigned multiply instructions (8 bits x 8 bits, 16 bits x 16 bits) • Signed and unsigned divide instructions (16 bits ÷ 8 bits, 32 bits ÷ 16 bits) • Bit accumulator function • Bit manipulation instructions with register-indirect specification of bit positions Memory H8/3067 • ROM: 128 kbytes • RAM: 4 kbytes H8/3066 • ROM: 96 kbytes • RAM: 4 kbytes H8/3065 • ROM: 64 kbytes • RAM: 2 kbytes Interrupt controller • Seven external interrupt pins: NMI, IRQ 0 to IRQ5 • 36 internal interrupts • Three selectable interrupt priority levels |
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