SH7014 datasheet(436/754 Pages) RENESAS

436 / 754 page

14. Mid-Speed A/D Converter

⎯ SH7016, SH7017 ⎯

Rev.5.00 Sep. 27, 2007 Page 402 of 716

REJ09B0398-0500

14.2.2

A/D Control/Status Register (ADCSR)

ADIE

ADF

ADST

SCAN

CKS

CH2

CH1

CH0

654

000

R/W :

R/(W)*

R/W

Bit :

Initial value :

Note: * Only 0 can be written to clear the flag.

The A/D control/status register (ADCSR) is register that can read/write in 8 bits and control mid-

speed A/D converter operations such as mode selection.

The ADCSR is initialized to H'00 during power-on reset.

Bit 7

⎯A/D End Flag (ADF): Status flag that indicates end of A/D conversion.

Bit 7

ADF

Description

[Clear conditions]

(Initial value)

1. Writing 0 to ADF after reading ADF with ADF = 1

2. When registers of the mid-speed converter are accessed after the DMAC is

activated by ADI interrupt.

[Set conditions]

Single mode: When A/D conversion is complete

Scan mode: When A/D conversion of all designated channels are complete

Bit 6

⎯A/D Interrupt Enable (ADIE): Enables or disables interrupt request (ADI) due to

completion of A/D conversion.

Bit 6

ADIE

Description

Disables interrupt request (ADI) due to completion of A/D conversion

(Initial value)

Enables interrupt request (ADI) due to completion of A/D conversion

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