SH7014 datasheet(553/754 Pages) RENESAS

553 / 754 page

18. 128 kB Flash Memory (F-ZTAT)

Rev.5.00 Sep. 27, 2007 Page 519 of 716

REJ09B0398-0500

Erase complete

Start

Set SWE bit in FLMCR1

Set ESU-bit of FLMCR1

Set E-bit of FLMCR1

Wait 10

μs

Wait 200

μs

n = 1

Set EBR1

WDT Enable

Wait 5 ms

Wait 10

μs

Wait 10

μs

Wait 20

μs

Set top block address to verify address

Wait 2

μs

Wait 5

μs

Erase start

Clear E-bit of FLMCR1

Clear ESU-bit of FLMCR1

Set EV-bit of FLMCR1

Dummy write H'FF to verify address

Read verify data

Clear EV-bit of FLMCR1

Wait 5

μs

Clear EV-bit of FLMCR1

Clear SWE-bit in FLMCR1

WDT Disable

Erase stop

Verify data = all "1"?

Last block address?

All

objective blocks

erased?

Erase error

Clear SWE-bit of FLMCR1

> 60

← n + 1

Address

increment

Notes: 1. Preprogramming (setting erase block data to all "0") is not necessary.

2. Verify data is read in 32-bit (longword) units.

3. Set only one bit in EBR1. More than one bit cannot be set.

4. Erasing is performed in block units. To erase a number of blocks, each block must be erased in turn.

Figure 18.14 Erase/Erase-Verify Flowchart (Single-Block Erase)

SH7014 Datasheet(PDF) 553 Page - Renesas Technology Corp

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