SH7014 datasheet(582/754 Pages) RENESAS

582 / 754 page

19. Mask ROM

Rev.5.00 Sep. 27, 2007 Page 548 of 716

REJ09B0398-0500

Internal data bus (32-bit)

H'00000000

H'00000004

H'00000001

H'00000005

H'00000002

H'00000006

H'00000003

H'00000007

H'0001FFFC

H'0001FFFD

H'0001FFFE

H'0001FFFF

On-chip ROM

Figure 19.2 Mask ROM Block Diagram (128 kbyte version)

The operating mode determines whether the on-chip ROM is valid or not. The operating mode is

selected using mode-setting pins MD3 to MD0 as shown in table 19.1. If you are using the on-chip

ROM, select mode 2 or mode 3; if you are not, select mode 0 or 1. The on-chip ROM is allocated

to addresses H'00000000 to H'0000FFFF of memory area 0 for the 64 kbyte version and

H'00000000 to H'0001FFFF of memory area 0 for the 128 kbyte version.

Table 19.1

Operation Modes and ROM

Mode Setting Pin

Operation Mode

MD3 MD2 MD1 MD0 Area 0

Mode 0 (MCU mode 0)

On-chip ROM invalid, external 8-bit space

Mode 1 (MCU mode 1)

On-chip ROM invalid, external 16-bit space

Mode 2 (MCU mode 2)

On-chip ROM valid, external space

(bus width set with bus state controller)

Mode 3 (MCU mode 3)

On-chip ROM valid, single-chip mode

Legend:

0: Low

1: High

Note:

Refer to section 3, Operating Modes.

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