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SH7014 Datasheet(PDF) 646 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 646 Page - Renesas Technology Corp |
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646 / 754 page ![]() Appendix A On-Chip Supporting Module Registers Rev.5.00 Sep. 27, 2007 Page 612 of 716 REJ09B0398-0500 BSC Wait Control Register 2 (WCR2) H'FFFF8626 8/16/32 Bit Item 15 14 13 12 11 10 9 8 Bit name ― ― ― ― ― ― ― ― Initial value 0 0 0 0 0 0 0 0 R/W R R R R R R R R Item 7 6 5 4 3 2 1 0 Bit name ― ― DDW1 DDW0 DSW3 DSW2 DSW1 DSW0 Initial value 0 0 0 0 1 1 1 1 R/W R R R/W R/W R/W R/W R/W R/W Bit Name Value Description 0 0 2-cycle (no wait) external wait disabled (initial value) 0 1 3-cycle (1 wait) external wait disabled 1 0 4-cycle (2 wait) external wait enabled 5, 4 DRAM Space DMA Single Address Mode Access Wait Specification (DDW1, DDW0) 1 1 5-cycle (3 wait) external wait enabled 0 0 0 0 No wait (external wait input disabled) 0 0 0 1 1 wait (external wait input enabled) … 3 to 0 CS Space DMA Single Address Mode Access Wait Specification (DSW3 to DSW0) 1 1 1 1 15 wait (external wait input enabled) (initial value) DRAM Area Control Register (DCR) H'FFFF862A 8/16/32 Bit Item 15 14 13 12 11 10 9 8 Bit name TPC RCD TRAS1 TRAS0 DWW1 DWW0 DWR1 DWR0 Initial value 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Item 7 6 5 4 3 2 1 0 Bit name DIW ― BE RASD ― SZ0 AMX1 AMX0 Initial value 0 0 0 0 0 0 0 0 R/W R/W R R/W R/W R R/W R/W R/W |
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