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SH7014 Datasheet(PDF) 648 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 648 Page - Renesas Technology Corp |
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648 / 754 page ![]() Appendix A On-Chip Supporting Module Registers Rev.5.00 Sep. 27, 2007 Page 614 of 716 REJ09B0398-0500 BSC Refresh Timer Control/Status Register (RTCSR) H'FFFF862C 8/16/32 Bit Item 15 14 13 12 11 10 9 8 Bit name ― ― ― ― ― ― ― ― Initial value 0 0 0 0 0 0 0 0 R/W R R R R R R R R Item 7 6 5 4 3 2 1 0 Bit name ― CMF CMIE CKS2 CKS1 CKS0 RFSH RMD Initial value 0 0 0 0 0 0 0 0 R/W R R/W R/W R/W R/W R/W R/W R/W Bit Name Value Description 0 Clear condition: After RTCSR is read when CMF is 1, 0 is written in CMF (initial value) 6 Compare Match Flag (CMF) 1 Set condition: RTCNT = RTCOR Note: When both RTCNT and RTCOR are in an initialized state (when values have not been rewritten since initialization, and RTCNT has not had its value changed due to a countup), RTCNT and RTCOR match, as both are H'0000, but in this case CMF is not set. 0 Disables an interrupt request caused by CMF (initial value) 5 Compare Match Interrupt Enable (CMIE) 1 Enables an interrupt request caused by CMF 0 Stops count-up (initial value) 0 1 φ/2 0 φ/8 0 1 1 φ/32 0 φ/128 0 1 φ/512 0 φ/2048 4 to 2 Clock Select (CKS2 to CKS0) 1 1 1 φ/4096 0 Do not refresh DRAM (initial value) 1 Refresh Control (RFSH) 1 Refresh DRAM 0 CAS-before-RAS refresh (initial value) 0 Refresh Mode (RMD) 1 Self-refresh |
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