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SH7014 Datasheet(PDF) 146 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 146 Page - Renesas Technology Corp |
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146 / 754 page ![]() 8. Bus State Controller (BSC) Rev.5.00 Sep. 27, 2007 Page 112 of 716 REJ09B0398-0500 Bit 1 SW1 Description 0 No CS1 space CS assert extension 1 CS1 space CS assert extension (initial value) Bit 0 SW0 Description 0 No CS0 space CS assert extension 1 CS0 space CS assert extension (initial value) 8.2.3 Wait Control Register 1 (WCR1) WCR1 is a 16-bit read/write register that specifies the number of wait cycles (0 to 15) for each CS space. WCR1 is initialized by power-on resets to H'FFFF, but is not initialized by software standbys. Bit: 15 14 13 12 11 10 9 8 W33 W32 W31 W30 W23 W22 W21 W20 Initial value: 1 1 1 1 1 1 1 1 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 W13 W12 W11 W10 W03 W02 W01 W00 Initial value: 1 1 1 1 1 1 1 1 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bits 15 to 12 ⎯CS3 Space Wait Specification (W33, W32, W31, W30): Specifies the number of waits for CS3 space access. Bit 15 W33 Bit 14 W32 Bit 13 W31 Bit 12 W30 Description 0 0 0 0 No wait (external wait input disabled) 0 0 0 1 1 wait external wait input enabled ⋅⋅⋅ 1 1 1 1 15 wait external wait input enabled (initial value) |
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