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SH7014 Datasheet(PDF) 152 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 152 Page - Renesas Technology Corp |
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152 / 754 page  8. Bus State Controller (BSC) Rev.5.00 Sep. 27, 2007 Page 118 of 716 REJ09B0398-0500 Bits 1 and 0 ⎯DRAM Address Multiplex (AMX1 and AMX0): Specifies the DRAM address multiplex count. Bit 1 AMX1 Bit 0 AMX0 Description 0 0 9 bit (initial value) 1 10 bit 1 0 11 bit 1 12 bit 8.2.6 Refresh Timer Control/Status Register (RTCSR) RTCSR is a 16-bit read/write register that selects the refresh mode and the clock input to the refresh timer counter (RTCNT), and controls compare match interrupts (CMI). RTCSR is initialized by power-on resets to H'0000, but is not initialized by software standbys. Bit: 15 14 13 12 11 10 9 8 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Initial value: 0 0 0 0 0 0 0 0 R/W: R R R R R R R R Bit: 7 6 5 4 3 2 1 0 ⎯ CMF CMIE CKS2 CKS1 CKS0 RFSH RMD Initial value: 0 0 0 0 0 0 0 0 R/W: R R/W R/W R/W R/W R/W R/W R/W Bits 15 to 7 ⎯Reserved: These bits always read as 0. The write value should always be 0 |
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