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SH7014 Datasheet(PDF) 187 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 187 Page - Renesas Technology Corp |
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187 / 754 page ![]() 9. Direct Memory Access Controller (DMAC) Rev.5.00 Sep. 27, 2007 Page 153 of 716 REJ09B0398-0500 9.2.3 DMA Transfer Count Registers 0, 1 (DMATCR0, DMATCR1) DMA transfer count registers 0, 1 (DMATCR0, DMATCR1) are 16-bit read/write registers that specify the transfer count for the channel (byte count, word count, or longword count). Specifying a H'000001 gives a transfer count of 1, while H'000000 gives the maximum setting, 65,536 transfers. While DMAC is in operation, the number of transfers to be performed is indicated. The initial value after power-on resets or in software standby mode is undefined. Upper sixteen bits of this register are read as 0 and the write value should always be 0. Bit: 31 30 29 28 27 26 25 24 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Initial value: 0 0 0 0 0 0 0 0 R/W: R R R R R R R R Bit: 23 22 21 20 19 18 17 16 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Initial value: ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W: R R R R R R R R Bit: 15 14 13 12 11 10 9 8 Initial value: ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 Initial value: ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W: R/W R/W R/W R/W R/W R/W R/W R/W |
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