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SH7014 Datasheet(PDF) 257 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 257 Page - Renesas Technology Corp |
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257 / 754 page ![]() 10. Multifunction Timer Pulse Unit (MTU) Rev.5.00 Sep. 27, 2007 Page 223 of 716 REJ09B0398-0500 Bits 2 to 0 ⎯Timer Synchronization 2 to 0 (SYNC2 to SYNC0): Selects operation independent of, or synchronized to, other channels. Synchronous operation allows synchronous clears due to multiple TCNT synchronous presets and other channel counter clears. A minimum of two channels must have SYNC bits set to 1 for synchronous operation. For synchronization clearing, it is necessary to set the TCNT counter clear sources (the CCLR2 to CCLR0 bits of the TCR register), in addition to the SYNC bit. The counter start to channel and bit-to-channel correspondence are indicated in the tables below. Counter Start Channel SYNC2 Channel 2 (TCNT2) SYNC1 Channel 1 (TCNT1) SYNC0 Channel 0 (TCNT0) Bit n SYNCn Description 0 Timer counter (TCNTn) independent operation (initial value) (TCNTn preset/clear unrelated to other channels) 1 Timer counter synchronous operation* 1 TCNTn synchronous preset/ synchronous clear* 2 possible Notes: n = 2 to 0. 1. Minimum of two channel SYNC bits must be set to 1 for synchronous operation. 2. TCNT counter clear sources (CCLR2 to CCLR0 bits of the TCR register) must be set in addition to the SYNC bit in order to have clear synchronization. Bits 7 to 3 ⎯Reserved: These bits always read as 0. The write value should always be 0. |
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