SH7014 datasheet(262/754 Pages) RENESAS

262 / 754 page

10. Multifunction Timer Pulse Unit (MTU)

Rev.5.00 Sep. 27, 2007 Page 228 of 716

REJ09B0398-0500

CST bit

TCNT value

Time

H'FFFF

H'0000

TCFV

Figure 10.7 Free-Running Counter Operation

Periodic Counter Operation Example: Periodic counter operation is obtained for a given

channel's TCNT by selecting compare-match as a TCNT clear source. Set the TGR register for

period setting to output compare register and select counter clear upon compare-match using the

CCLR2 to CCLR0 bits of the timer control register (TCR). After these settings, the TCNT begins

incrementing as a periodic counter when the corresponding bit of TSTR is set to 1. When the

count matches the TGR register value, the TGF bit in the TSR is set to 1 and the counter is cleared

to H'0000. If the TGIE bit of the corresponding TIER is set to 1 at this point, the MTU will make

an interrupt request to the interrupt controller. After the compare-match, TCNT continues counting

from H'0000. Figure 10.8 shows an example of periodic counting.

CST bit

TCNT value

Time

Counter cleared by

TGR compare match

TGR

H'0000

TGF

Flag cleared by software

or DMAC activation

Figure 10.8 Periodic Counter Operation

SH7014 Datasheet(PDF) 262 Page - Renesas Technology Corp