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7641 Datasheet(PDF) 374 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 374 Page - Renesas Technology Corp |
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374 / 385 page ![]() Addressing mode ZP, X ZP, Y ABS ABS, X ABS, Y IND ZP, IND IND, X IND, Y REL SP 7 6 5 4 3 2 1 0 Processor status register NV T B D I Z C OP n# OP n# OP n# OP n# OP n # OP n# OP n# OP n# OP n# OP n# OP n # Addressing mode Symbol Function Details IMP IMM A BIT, A ZP BIT, ZP OP n# OP n# OP n# OP n# OP n# OP n # 7641 Group APPENDIX 3.7 Machine instructions Rev.2.00 Aug 28, 2006 page 96 of 108 REJ09B0336-0200 7641 Group APPENDIX 3.7 Machine instructions Rev.2.00 Aug 28, 2006 page 97 of 108 REJ09B0336-0200 D5 D6 CD EC CC CE 50 70 2 2 2 2 • • • • • • • • • • • N N N N N • • • • • • • • • • 0 • • • • • 4 6 4 4 4 6 3 3 3 3 DD DE 5 7 3 3 D9 5 3 C1 6 2 D1 6 2 • • • • • • • • • 0 • • • • • • • • 1 • • • • • • • • • • • • • • • • • • • • 0 • • • • • • • • • • 1 • • • • • 0 • • • • • • • • • • • • • • • • • • Z Z Z Z Z • • • • • • 0 • • • • C • C C • 2 2 10 80 2 3 2 2 This instruction takes a branch to the ap- pointed address if N is 0. The branch address is specified by a relative address. If N is 1, the next instruction is executed. This instruction branches to the appointed ad- dress. The branch address is specified by a relative address. When the BRK instruction is executed, the CPU pushes the current PC contents onto the stack. The BADRS designated in the interrupt vector table is stored into the PC. This instruction takes a branch to the ap- pointed address if V is 0. The branch address is specified by a relative address. If V is 1, the next instruction is executed. This instruction takes a branch to the ap- pointed address when V is 1. The branch address is specified by a relative address. When V is 0, the next instruction is executed. This instruction clears the designated bit i of A or M. This instruction clears C. This instruction clears D. This instruction clears I. This instruction clears T. This instruction clears V. When T = 0, this instruction subtracts the con- tents of M from the contents of A. The result is not stored and the contents of A or M are not modified. When T = 1, the CMP subtracts the contents of M from the contents of M(X). The result is not stored and the contents of X, M, and A are not modified. M(X) represents the contents of memory where is indicated by X. This instruction takes the one’s complement of the contents of M and stores the result in M. This instruction subtracts the contents of M from the contents of X. The result is not stored and the contents of X and M are not modified. This instruction subtracts the contents of M from the contents of Y. The result is not stored and the contents of Y and M are not modified. This instruction subtracts 1 from the contents of A or M. BPL (Note 5) (Note 8) BRA (Note 6) BRK BVC (Note 5) BVS (Note 5) CLB CLC CLD CLI CLT CLV CMP (Note 3) COM CPX CPY DEC N = 0? PC ← PC ± offset B ← 1 (PC) ← (PC) + 2 M(S) ← PCH S ← S – 1 M(S) ← PCL S ← S – 1 M(S) ← PS S ← S – 1 I ← 1 PCL ← ADL PCH ← ADH V = 0? V = 1? Ai or Mi ← 0 C ← 0 D ← 0 I ← 0 T ← 0 V ← 0 When T = 0 A – M When T = 1 M(X) – M __ M ← M X – M Y – M A ← A – 1 or M ← M – 1 18 D8 58 12 B8 1 1 2 1 1 1 1 1 1 1 C9 E0 C0 2 2 2 2 2 2 1A 1 1 1B + 20i C5 44 E4 C4 C6 3 5 3 3 5 2 2 2 2 2 1F + 20i 11 52 00 7 1 |
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