7641 datasheet(250/385 Pages) RENESAS

250 / 385 page

Rev.2.00

Aug 28, 2006

page 119 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.9 Special count source generator (SCSG)

2.9.3 Functional description

The special count source generator, SCSG, consists of two 8-bit timers: SCSG1 and SCSG2. The output

of the special count source generator can be used as a clock source for the timer X, serial I/O and two

UARTs (UART1 and UART2).

(1) SCSG1

The SCSG1 is a 8-bit down-count timer. An output from SCSG1 is used as an count source of

SCSG2. The division ratio of SCSG1 is given by 1 / (n1 + 1) and the count source of SCSG2

becomes

φ ✕ {n1 / (n1 + 1)}.

n1: value set to the SCSG1

Writing data to the SCSG1 can be performed anytime. When the SCSG1 data write control bit is set

to “0” and data is written to the SCSG1, the data is written to the latch and timer at the same time.

When that bit is set to “1”, the data is only written to the latch. When the count reaches “0”, an

underflow occurs at the next count source rising edge and the contents of the timer latch are loaded

to the timer.

If the SCSG1 count stop bit is set to “1” or the SCSG1 set value is “0”, this count source

φ is not

divided, so that the count source for SCSG2 becomes

φ.

(2) SCSG2

The SCSG2 is a 8-bit down-count timer. This uses an output from SCSG1 as an count source.

The SCSG2 output is Clock SCSGCLK. The frequency is calculated as follows:

SCSGCLK =

φ ✕ {n1 / (n1+1)} ✕ {1 / (n2+1)}

n1: value set to SCSG1

n2: value set to SCSG2

Writing data to the SCSG2 can be performed anytime. When the SCSG2 data write control bit is set

to “0” and data is written to the SCSG2, the data is written to the latch and timer at the same time.

When that bit is set to “1”, the data is only written to the latch. When the count reaches “0”, an

underflow occurs at the next count source rising edge and the contents of the timer latch are loaded

to the timer.

If the SCSGCLK output control bit is set to “0”, the SCSG1 and SCSG2 stop their counts and

SCSGCLK output is disabled. To use the SCSGCLK, set this bit to “1”.

7641 Datasheet(PDF) 250 Page - Renesas Technology Corp