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SH7713 Datasheet(PDF) 346 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 346 Page - Renesas Technology Corp |
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346 / 904 page ![]() Section 10 Power-Down Modes Rev.1.50 Aug. 30, 2006 Page 306 of 860 REJ09B0288-0150 10.3.4 STATUS Pin Change Timings The STATUS1 and STATUS0 pin change timings are shown below. Reset: • Power-on reset CKIO STATUS PLL setting time *1 reset : HH (STATUS1 = High, STATUS0 = High) *2 normal : LL (STATUS1 = Low, STATUS0 = Low) *3 Bcyc : Bus clock cycle Notes: *2 *2 *1 0 to 30 Bcyc*3 0 to 5 Bcyc normal reset normal *3 RESETP CKIO2 Figure 10.2 STATUS Output at Power-On Reset |
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