SH7713 datasheet(836/904 Pages) RENESAS

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Section 24 Electrical Characteristics

Rev.1.50 Aug. 30, 2006 Page 796 of 860

REJ09B0288-0150

24.3.3

AC Bus Timing

Table 24.7

Bus Timing (1)

(Conditions: V

CCQ = VCCQ-RTC = 3.0 to 3.6 V, VCC = VCC-PLL1 = VCC-PLL2 = 1.4 to 1.6 V,

SSQ = VSS = VSSQ-RTC = VSS-PLL1 = VSS-PLL2 = 0 V, Ta = –20 to 75°C, clock mode 0/1/2/4/5/6/7)

66.67 MHz

Item

Symbol Min.

Max.

Unit

Figure

Address delay time 1

AD1

24.17 to 24.42

Address delay time 2

AD2

—

1/2 t

cyc+12

24.21

Address setup time

—

24.17 to 24.20

Address hold time

—

BS delay time

BSD

—

24.17 to 24.35, 24.39 to

24.42

CS delay time 1

CSD1

24.17 to 24.42

Read/write delay time 1

RWD1

Read strobe delay time

RSD

—

1/2 t

cyc+10

24.17 to 24.21, 24.39 to

24.40

Read data setup time 1

RDS1

1/2 t

cyc+6

—

24.17 to 24.20, 24.39 to

24.42

Read data setup time 2

RDS2

—

24.22 to 24.25, 24.30 to

24.32

Read data setup time 3

RDS3

1/2 t

cyc+6

—

24.21

Read data hold time 1

RDH1

—

24.17 to 24.20, 24.39 to

24.42

Read data hold time 2

RDH2

—

24.22 to 24.25, 24.30 to

24.32

Read data hold time 3

RDH3

—

24.21

Write enable delay time

WED

—

1/2 t

cyc+10

24.17 to 24.21, 24.39 to

24.40

Write data delay time 1

WDD1

—

24.17 to 24.20, 24.39 to

24.42

Write data delay time 2

WDD2

—

24.26 to 24.29, 24.33 to

24.35

Write data hold time 1

WDH1

—

24.17 to 24.20

Write data hold time 2

WDH2

—

24.26 to 24.29, 24.33 to

24.35

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