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SH7713 Datasheet(PDF) 832 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 832 Page - Renesas Technology Corp |
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832 / 904 page  Section 24 Electrical Characteristics Rev.1.50 Aug. 30, 2006 Page 792 of 860 REJ09B0288-0150 EXTAL input, CKIO input Stable input clock IRL3 to IRL0/IRQ5 to IRQ0 interrupt request Stable input clock Normal Normal PLL output, CKIO output Internal clock STATUS 0 STATUS 1 Note: PLL oscillation settling time when clock is input from EXTAL pin or CKIO pin in oscillation continuous mode. t PLL1 PLL synchronization Standby PLL synchronization t IRLSTB Figure 24.10 PLL Synchronization Settling Time by IRQ/IRL Interrupts EXTAL input*1 (CKIO input) CKIO output*2 (PLL output) Internal clock Multiplication ratio modified t PLL2 Notes: 1. CKIO input in clock mode 7 2. PLL output except in clock mode 7 Figure 24.11 PLL Synchronization Settling Time when Frequency Multiplication Ratio Modified |
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