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SH7713 Datasheet(PDF) 828 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 828 Page - Renesas Technology Corp |
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828 / 904 page  Section 24 Electrical Characteristics Rev.1.50 Aug. 30, 2006 Page 788 of 860 REJ09B0288-0150 24.3.1 Clock Timing Table 24.5 Clock Timing (Condition: V CCQ = VCCQ-RTC = 3.0 to 3.6 V, VCC = VCC-PLL1 = VCC-PLL2 = 1.4 to 1.6 V, V SSQ = VSS = VSSQ-RTC = VSS-PLL1 = VSS-PLL2 = 0 V, Ta = –20 to 75°C, maximum external bus operating frequency: 66.67 MHz) Item Symbol Min. Max. Unit Figure EXTAL clock input frequency f EX 10 66.67 MHz 24.2 EXTAL clock input cycle time t EXcyc 15 100 ns EXTAL clock input low pulse width t EXL 1.5 — EXTAL clock input high pulse width t EXH 1.5 — EXTAL clock input rise time t EXR — 6 EXTAL clock input fall time t EXF — 6 CKIO clock input frequency f CKI 33.34 66.67 MHz 24.3 CKIO clock input cycle time t CKIcyc 15 30 ns CKIO clock input low pulse width t CKIL 3 — CKIO clock input high pulse width t CKIH 3 — CKIO clock input rise time t CKIR — 4 CKIO clock input fall time t CKIF — 4 CKIO clock output frequency f OP 33.34 66.67 MHz 24.4 CKIO clock output cycle time t cyc 15 30 ns CKIO clock output low pulse width t CKOL 3 — CKIO clock output high pulse width t CKOH 3 — CKIO clock output rise time t CKOR — 4 CKIO clock output fall time t CKOF — 4 CKIO2 clock output delay time t CK2D — 2.5 CKIO2 clock output rise time t CK2OR — 7 CKIO2 clock output fall time t CK2OF — 7 Power-on oscillation settling time t OSC1 10 — ms 24.5 RESETP setup time t RESPS 20 — ns 24.5 RESETP assert time t RESPW 20 — t cyc 24.5, 24.6 RESETM assert time t RESMW 20 — t cyc 24.6 Standby return oscillation settling time 1 t OSC2 10 — ms 24.6 Standby return oscillation settling time 2 t OSC3 10 — ms 24.7 Standby return oscillation settling time 3 t OSC4 11 — ms 24.8 |
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